Date: October 15, 2026
Time: 11:45 a.m. - 12:45 p.m.
Location: G01 Gates Hall
Title: Toward Accelerator-Centric Computing
Speaker: Josep Torrellas, University of Illinois Urbana-Champaign
Host: Rachee Singh
Abstract: Given current energy-consumption trends, there is ample consensus that we will have to move most computation to hardware accelerators. This is because accelerators are the most energy-efficient platforms. However, from the evidence of past efforts in this direction, architecting an accelerator-centric computing environment looks very challenging. It is unclear what architectural designs and software advances would really enable this new paradigm. In this talk, I will outline our vision of the hardware and software needed for a successful accelerator-centric computing environment, and some of the efforts that we are doing in this direction.
Bio: Josep Torrellas is the Thomas M. Siebel Chair in Computer Science at the University of Illinois at Urbana-Champaign (UIUC). He is the Director of the ACE Center for Evolvable Computing (an SRC/DARPA JUMP 2.0 Center), past Co-Leader of an Intel Strategic Research Alliance (ISRA) on Computer Security, and past Director of the Illinois-Intel Parallelism Center (I2PC). His research interests are multiprocessor computer architectures and parallel computing. Some of his contributions include thread-level speculation (TLS) architectures, the Bulk Multiprocessor concept, deterministic record and replay mechanisms, process variation mitigation techniques, and hardware defenses against speculative execution attacks. In addition, he has contributed to several experimental multiprocessor designs such as IBM’s PERCS Multiprocessor, Intel’s Runnemede Extreme-Scale Multiprocessor, Illinois Cedar, and Stanford DASH. Torrellas has received the IEEE CS Harry H. Goode Memorial Award, the UIUC College of Engineering Daniel C. Drucker Eminent Faculty Award, the UIUC Campus Award for Excellence in Graduate Student Mentoring, the IEEE CS Edward J. McCluskey Technical Achievement Award. He is an IEEE Computer Society Golden Core Member, and a Fellow of IEEE, ACM, and AAAS. He was the Chair of the IEEE Technical Committee on Computer Architecture (TCCA). He has served in the Board of Directors of the Computing Research Association (CRA) and has been a Council Member of CRA’s Computing Community Consortium (CCC). He was a member of the U.S. National Academies Board on Army Research and Development. He serves in the International Roadmap for Devices and Systems (IRDS). He received a PhD from Stanford University.