<article>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#article09_11_16_2020235</id>
	<title>Intel Allows Release of Full 4004 Chip-Set Details</title>
	<author>timothy</author>
	<datestamp>1258360260000</datestamp>
	<htmltext>mcpublic writes <i>"When a small team of reverse engineers receives the blessing of a big corporate legal department, it is cause for celebration.  For the 38th anniversary of Intel's groundbreaking 4004 microprocessor, the company is allowing us to release new details of their historic MCS-4 chip family <a href="http://www.4004.com/4004-ad.htm">announced on November 15, 1971</a>.  For the first time, the complete set of <a href="http://www.4004.com/mcs4-masks-schematics-sim.html">schematics and artwork</a> for the 4001 ROM, 4002 RAM, 4003 I/O Expander, and 4004 Microprocessor is available to teachers, students, historians, and other <a href="http://creativecommons.org/licenses/by-nc-sa/3.0/">non-commercial</a> users.  To their credit, the <a href="http://www.intel.com/museum/archives/index.htm">Intel Corporate Archives</a> gave us access to the original 4004 schematics, along with the 4002, 4003, and 4004 mask proofs, but the rest of the schematics and the elusive 4001 masks were lost until just weeks ago when Lajos Kintli finished reverse-engineering the 4001 ROM from <a href="http://www.4004.com/mcs4-masks-schematics-sim.html#photos">photomicrographs</a> and improving the circuit-extraction software that helped him draw and verify the missing schematics.  His <a href="http://www.4004.com/mcs4-masks-schematics-sim.html#simulator">interactive software</a> can simulate an ensemble of 400x chips, and even lets you trace a wire or click on a transistor in the chip artwork window and see exactly where it is on the circuit diagram (and vice-versa)."</i></htmltext>
<tokenext>mcpublic writes " When a small team of reverse engineers receives the blessing of a big corporate legal department , it is cause for celebration .
For the 38th anniversary of Intel 's groundbreaking 4004 microprocessor , the company is allowing us to release new details of their historic MCS-4 chip family announced on November 15 , 1971 .
For the first time , the complete set of schematics and artwork for the 4001 ROM , 4002 RAM , 4003 I/O Expander , and 4004 Microprocessor is available to teachers , students , historians , and other non-commercial users .
To their credit , the Intel Corporate Archives gave us access to the original 4004 schematics , along with the 4002 , 4003 , and 4004 mask proofs , but the rest of the schematics and the elusive 4001 masks were lost until just weeks ago when Lajos Kintli finished reverse-engineering the 4001 ROM from photomicrographs and improving the circuit-extraction software that helped him draw and verify the missing schematics .
His interactive software can simulate an ensemble of 400x chips , and even lets you trace a wire or click on a transistor in the chip artwork window and see exactly where it is on the circuit diagram ( and vice-versa ) .
"</tokentext>
<sentencetext>mcpublic writes "When a small team of reverse engineers receives the blessing of a big corporate legal department, it is cause for celebration.
For the 38th anniversary of Intel's groundbreaking 4004 microprocessor, the company is allowing us to release new details of their historic MCS-4 chip family announced on November 15, 1971.
For the first time, the complete set of schematics and artwork for the 4001 ROM, 4002 RAM, 4003 I/O Expander, and 4004 Microprocessor is available to teachers, students, historians, and other non-commercial users.
To their credit, the Intel Corporate Archives gave us access to the original 4004 schematics, along with the 4002, 4003, and 4004 mask proofs, but the rest of the schematics and the elusive 4001 masks were lost until just weeks ago when Lajos Kintli finished reverse-engineering the 4001 ROM from photomicrographs and improving the circuit-extraction software that helped him draw and verify the missing schematics.
His interactive software can simulate an ensemble of 400x chips, and even lets you trace a wire or click on a transistor in the chip artwork window and see exactly where it is on the circuit diagram (and vice-versa).
"</sentencetext>
</article>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121428</id>
	<title>4004.com = 4004 Web Server?</title>
	<author>Anonymous</author>
	<datestamp>1258365840000</datestamp>
	<modclass>Funny</modclass>
	<modscore>1</modscore>
	<htmltext><p>Cruising over to 4004.com gives "page cannot be displayed".  While I'm sure it's slashdotted, I can't help but wonder if they used one for their web server......</p></htmltext>
<tokenext>Cruising over to 4004.com gives " page can not be displayed " .
While I 'm sure it 's slashdotted , I ca n't help but wonder if they used one for their web server..... .</tokentext>
<sentencetext>Cruising over to 4004.com gives "page cannot be displayed".
While I'm sure it's slashdotted, I can't help but wonder if they used one for their web server......</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122674</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>mako1138</author>
	<datestamp>1258370160000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>This would be an interesting homework problem for a digital design class. First, find the single-cycle instruction that will take the longest amount of time. Then, figure out the critical path. Find the logic delay given a particular modern <a href="http://en.wikipedia.org/wiki/Standard\_cell" title="wikipedia.org">standard cell</a> [wikipedia.org] library.</p></htmltext>
<tokenext>This would be an interesting homework problem for a digital design class .
First , find the single-cycle instruction that will take the longest amount of time .
Then , figure out the critical path .
Find the logic delay given a particular modern standard cell [ wikipedia.org ] library .</tokentext>
<sentencetext>This would be an interesting homework problem for a digital design class.
First, find the single-cycle instruction that will take the longest amount of time.
Then, figure out the critical path.
Find the logic delay given a particular modern standard cell [wikipedia.org] library.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127690</id>
	<title>Re:Awesome!</title>
	<author>Alioth</author>
	<datestamp>1258463280000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>Learning about designing your own CPU from scratch? Snore?</p><p>I think you may be on the wrong course.</p></htmltext>
<tokenext>Learning about designing your own CPU from scratch ?
Snore ? I think you may be on the wrong course .</tokentext>
<sentencetext>Learning about designing your own CPU from scratch?
Snore?I think you may be on the wrong course.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121806</id>
	<title>Federico Faggin, intel4004.com</title>
	<author>Anonymous</author>
	<datestamp>1258367340000</datestamp>
	<modclass>Informativ</modclass>
	<modscore>4</modscore>
	<htmltext><p><a href="http://www.intel4004.com/" title="intel4004.com" rel="nofollow">http://www.intel4004.com/</a> [intel4004.com] goes into much greater detail about Federico Faggin (primary co-developer and project leader), and the story of his accomplishments before and at Intel, his physical signature on all 4000 series chips, Intel's successful attempt to discredit him and patent his invention (the buried gate) that he invented at Fairchild before coming to Intel, and his departure to found Zilog with some members of his older design team.</p><p>Intel has been playing their game their way for a very long time.</p></htmltext>
<tokenext>http : //www.intel4004.com/ [ intel4004.com ] goes into much greater detail about Federico Faggin ( primary co-developer and project leader ) , and the story of his accomplishments before and at Intel , his physical signature on all 4000 series chips , Intel 's successful attempt to discredit him and patent his invention ( the buried gate ) that he invented at Fairchild before coming to Intel , and his departure to found Zilog with some members of his older design team.Intel has been playing their game their way for a very long time .</tokentext>
<sentencetext>http://www.intel4004.com/ [intel4004.com] goes into much greater detail about Federico Faggin (primary co-developer and project leader), and the story of his accomplishments before and at Intel, his physical signature on all 4000 series chips, Intel's successful attempt to discredit him and patent his invention (the buried gate) that he invented at Fairchild before coming to Intel, and his departure to found Zilog with some members of his older design team.Intel has been playing their game their way for a very long time.</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122408</id>
	<title>Re:So in 2047...</title>
	<author>Anonymous</author>
	<datestamp>1258369200000</datestamp>
	<modclass>Interestin</modclass>
	<modscore>2</modscore>
	<htmltext><p>No.  <i>(I know the question was rhetorical, but I can't resist answering).</i></p><p>The 4004 had 2,300 transistors.  A college student can create and debug a processor more powerful than that in a semester.  It is possible to memorize the entire thing.  A Core i7 has around 300 million transistors. Unless human intelligence changes significantly, one human could not memorize and understand 300 million transistors.</p></htmltext>
<tokenext>No .
( I know the question was rhetorical , but I ca n't resist answering ) .The 4004 had 2,300 transistors .
A college student can create and debug a processor more powerful than that in a semester .
It is possible to memorize the entire thing .
A Core i7 has around 300 million transistors .
Unless human intelligence changes significantly , one human could not memorize and understand 300 million transistors .</tokentext>
<sentencetext>No.
(I know the question was rhetorical, but I can't resist answering).The 4004 had 2,300 transistors.
A college student can create and debug a processor more powerful than that in a semester.
It is possible to memorize the entire thing.
A Core i7 has around 300 million transistors.
Unless human intelligence changes significantly, one human could not memorize and understand 300 million transistors.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121050</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121360</id>
	<title>Re:Awesome!</title>
	<author>Anonymous</author>
	<datestamp>1258365540000</datestamp>
	<modclass>Offtopic</modclass>
	<modscore>0</modscore>
	<htmltext>Yeah, because there are a lot of microchip pirates with several billion dollars lying around to create a modern chip fab and copy cpu's willy-nilly, putting Intel out of business inside of a few weeks probably (heck, with the speed of modern chip pirates probably a few days!).</htmltext>
<tokenext>Yeah , because there are a lot of microchip pirates with several billion dollars lying around to create a modern chip fab and copy cpu 's willy-nilly , putting Intel out of business inside of a few weeks probably ( heck , with the speed of modern chip pirates probably a few days !
) .</tokentext>
<sentencetext>Yeah, because there are a lot of microchip pirates with several billion dollars lying around to create a modern chip fab and copy cpu's willy-nilly, putting Intel out of business inside of a few weeks probably (heck, with the speed of modern chip pirates probably a few days!
).</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121138</id>
	<title>Re:Awesome!</title>
	<author>ByOhTek</author>
	<datestamp>1258364760000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>Likewise for me, something like "SAM". It was a nice simple case, but not terribly interesting.</p><p>But maybe that's why they do the fake arch - because a real arch would be too complex? At least, that would explain undergraduate classes.</p></htmltext>
<tokenext>Likewise for me , something like " SAM " .
It was a nice simple case , but not terribly interesting.But maybe that 's why they do the fake arch - because a real arch would be too complex ?
At least , that would explain undergraduate classes .</tokentext>
<sentencetext>Likewise for me, something like "SAM".
It was a nice simple case, but not terribly interesting.But maybe that's why they do the fake arch - because a real arch would be too complex?
At least, that would explain undergraduate classes.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30129842</id>
	<title>Re:So, will it...</title>
	<author>haxor.dk</author>
	<datestamp>1258477380000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>Sure, Linux will run on it. Just imagine a whole bunch of blades of these...!!</p></htmltext>
<tokenext>Sure , Linux will run on it .
Just imagine a whole bunch of blades of these... !
!</tokentext>
<sentencetext>Sure, Linux will run on it.
Just imagine a whole bunch of blades of these...!
!</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121260</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124252</id>
	<title>Re:Non commercial use?</title>
	<author>sootman</author>
	<datestamp>1258378260000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>Yes! I intend to use this documentation as a starting point for my own product line. I hope to learn quickly and make more advanced designs, which will also be smaller, and I will compete directly with Intel. I will call my company <a href="http://en.wikipedia.org/wiki/AMD" title="wikipedia.org">Advanced Micro Designs.</a> [wikipedia.org]</p></htmltext>
<tokenext>Yes !
I intend to use this documentation as a starting point for my own product line .
I hope to learn quickly and make more advanced designs , which will also be smaller , and I will compete directly with Intel .
I will call my company Advanced Micro Designs .
[ wikipedia.org ]</tokentext>
<sentencetext>Yes!
I intend to use this documentation as a starting point for my own product line.
I hope to learn quickly and make more advanced designs, which will also be smaller, and I will compete directly with Intel.
I will call my company Advanced Micro Designs.
[wikipedia.org]</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122940</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172</id>
	<title>If one was produced with a 40nm process...</title>
	<author>ByOhTek</author>
	<datestamp>1258364820000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>I wonder what clockspeed it would get. I know it's completely useless/pointless, but I'd be interested to see anyway.</p></htmltext>
<tokenext>I wonder what clockspeed it would get .
I know it 's completely useless/pointless , but I 'd be interested to see anyway .</tokentext>
<sentencetext>I wonder what clockspeed it would get.
I know it's completely useless/pointless, but I'd be interested to see anyway.</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30125080</id>
	<title>Re:So, will it...</title>
	<author>Anonymous</author>
	<datestamp>1258385280000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>There is, or at least was: ELKS: http://elks.sourceforge.net/</p><p>I've had Linux running on an XT clone laptop with that.</p></htmltext>
<tokenext>There is , or at least was : ELKS : http : //elks.sourceforge.net/I 've had Linux running on an XT clone laptop with that .</tokentext>
<sentencetext>There is, or at least was: ELKS: http://elks.sourceforge.net/I've had Linux running on an XT clone laptop with that.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122522</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30120978</id>
	<title>Wow!  Imagine a Beowulf Cluster</title>
	<author>Anonymous</author>
	<datestamp>1258363980000</datestamp>
	<modclass>Offtopic</modclass>
	<modscore>0</modscore>
	<htmltext><p>of Intel 4004s!</p></htmltext>
<tokenext>of Intel 4004s !</tokentext>
<sentencetext>of Intel 4004s!</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136</id>
	<title>Re:Awesome!</title>
	<author>Anonymous</author>
	<datestamp>1258364760000</datestamp>
	<modclass>Informativ</modclass>
	<modscore>2</modscore>
	<htmltext>Real chips were made up at some point.

Computer architecture classes should teach you the concepts, then when you go work for Intel you can find out all about the latest secret architectures, and you can apply what you learned in CA to making them better.  Obviously you can't expect Intel to give out schematics for Core i7's or they would quickly go out of business.</htmltext>
<tokenext>Real chips were made up at some point .
Computer architecture classes should teach you the concepts , then when you go work for Intel you can find out all about the latest secret architectures , and you can apply what you learned in CA to making them better .
Obviously you ca n't expect Intel to give out schematics for Core i7 's or they would quickly go out of business .</tokentext>
<sentencetext>Real chips were made up at some point.
Computer architecture classes should teach you the concepts, then when you go work for Intel you can find out all about the latest secret architectures, and you can apply what you learned in CA to making them better.
Obviously you can't expect Intel to give out schematics for Core i7's or they would quickly go out of business.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122554</id>
	<title>Re:So in 2047...</title>
	<author>CityZen</author>
	<datestamp>1258369680000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>&gt; Unless human intelligence changes significantly...</p><p>Ah, so now we get to the meat of the matter!</p></htmltext>
<tokenext>&gt; Unless human intelligence changes significantly...Ah , so now we get to the meat of the matter !</tokentext>
<sentencetext>&gt; Unless human intelligence changes significantly...Ah, so now we get to the meat of the matter!</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122408</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121508</id>
	<title>Re:Awesome!</title>
	<author>loose electron</author>
	<datestamp>1258366260000</datestamp>
	<modclass>Informativ</modclass>
	<modscore>4</modscore>
	<htmltext><p>For the most part - Newer digital designs are language driven, not schematic driven. The advent of Verilog &amp;  VHDL lead to purely digital designs done up in code.</p><p>Some of the special devices are done using transistor level design, but synchronous logic these days is a HDL (hardware description language) followed by gate level synthesis, and then autoplace and auto routing.</p><p>A lot of fine tuning along the way for high performance items does get tweaked a lot but for the most part, digital chips are created as a coding exercise.</p></htmltext>
<tokenext>For the most part - Newer digital designs are language driven , not schematic driven .
The advent of Verilog &amp; VHDL lead to purely digital designs done up in code.Some of the special devices are done using transistor level design , but synchronous logic these days is a HDL ( hardware description language ) followed by gate level synthesis , and then autoplace and auto routing.A lot of fine tuning along the way for high performance items does get tweaked a lot but for the most part , digital chips are created as a coding exercise .</tokentext>
<sentencetext>For the most part - Newer digital designs are language driven, not schematic driven.
The advent of Verilog &amp;  VHDL lead to purely digital designs done up in code.Some of the special devices are done using transistor level design, but synchronous logic these days is a HDL (hardware description language) followed by gate level synthesis, and then autoplace and auto routing.A lot of fine tuning along the way for high performance items does get tweaked a lot but for the most part, digital chips are created as a coding exercise.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121206</id>
	<title>Re: Intel Allows Release of Full 4004 Chip-Set Det</title>
	<author>Anonymous</author>
	<datestamp>1258364940000</datestamp>
	<modclass>Funny</modclass>
	<modscore>1</modscore>
	<htmltext><p>Imagine a beowulf cluster of 4004 emulators...</p></htmltext>
<tokenext>Imagine a beowulf cluster of 4004 emulators.. .</tokentext>
<sentencetext>Imagine a beowulf cluster of 4004 emulators...</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122450</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>Anonymous</author>
	<datestamp>1258369380000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>No, that is an oversimplification.</p><p>It is true that the circuit design of a 4004 would limit the device to 740kHz, but the signal quality should be far above that of the 1970s technology it was originally designed for.</p><p>The size of a transistor is directly related to how long it takes for a carrier (electron or "hole") to transition across the MOSFET from the Drain to Source (or Source to Drain for the "holes"). The smaller the transistor, the faster this occurs. Smaller transistors also hold fewer total charges and therefore need less current flow to change the voltage, so the time to transition between a low voltage to a high or a high to low (0 to 1 or 1 to 0) is now shorter.</p><p>The actual quality of the square waves to represent a 0 or 1 can be pretty abysmal looking to human eyes and still function, so circuit designers would push the operating frequency of their circuit up to take advantage of the improved switching speed of the MOSFET structures that make up their logic gates.</p><p>A straight-from-layout 4004 would probably not operate above 740kHz, because that is the frequency of it's designed oscillator (usually an external crystal of a chosen size placed in a special circuit), but put a higher frequency crystal in, or even use a MOSFET-based oscillator (which, using multiple MOSFETs configured as a self-feeding NOT gate, would be slower than the maximum any one MOSFET could handle) would make the 4004 far, far faster.</p></htmltext>
<tokenext>No , that is an oversimplification.It is true that the circuit design of a 4004 would limit the device to 740kHz , but the signal quality should be far above that of the 1970s technology it was originally designed for.The size of a transistor is directly related to how long it takes for a carrier ( electron or " hole " ) to transition across the MOSFET from the Drain to Source ( or Source to Drain for the " holes " ) .
The smaller the transistor , the faster this occurs .
Smaller transistors also hold fewer total charges and therefore need less current flow to change the voltage , so the time to transition between a low voltage to a high or a high to low ( 0 to 1 or 1 to 0 ) is now shorter.The actual quality of the square waves to represent a 0 or 1 can be pretty abysmal looking to human eyes and still function , so circuit designers would push the operating frequency of their circuit up to take advantage of the improved switching speed of the MOSFET structures that make up their logic gates.A straight-from-layout 4004 would probably not operate above 740kHz , because that is the frequency of it 's designed oscillator ( usually an external crystal of a chosen size placed in a special circuit ) , but put a higher frequency crystal in , or even use a MOSFET-based oscillator ( which , using multiple MOSFETs configured as a self-feeding NOT gate , would be slower than the maximum any one MOSFET could handle ) would make the 4004 far , far faster .</tokentext>
<sentencetext>No, that is an oversimplification.It is true that the circuit design of a 4004 would limit the device to 740kHz, but the signal quality should be far above that of the 1970s technology it was originally designed for.The size of a transistor is directly related to how long it takes for a carrier (electron or "hole") to transition across the MOSFET from the Drain to Source (or Source to Drain for the "holes").
The smaller the transistor, the faster this occurs.
Smaller transistors also hold fewer total charges and therefore need less current flow to change the voltage, so the time to transition between a low voltage to a high or a high to low (0 to 1 or 1 to 0) is now shorter.The actual quality of the square waves to represent a 0 or 1 can be pretty abysmal looking to human eyes and still function, so circuit designers would push the operating frequency of their circuit up to take advantage of the improved switching speed of the MOSFET structures that make up their logic gates.A straight-from-layout 4004 would probably not operate above 740kHz, because that is the frequency of it's designed oscillator (usually an external crystal of a chosen size placed in a special circuit), but put a higher frequency crystal in, or even use a MOSFET-based oscillator (which, using multiple MOSFETs configured as a self-feeding NOT gate, would be slower than the maximum any one MOSFET could handle) would make the 4004 far, far faster.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122008</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121050</id>
	<title>So in 2047...</title>
	<author>CityZen</author>
	<datestamp>1258364340000</datestamp>
	<modclass>Funny</modclass>
	<modscore>4</modscore>
	<htmltext><p>When we get the Core i7 details, will it seem as quaint as the 4004 does now?</p></htmltext>
<tokenext>When we get the Core i7 details , will it seem as quaint as the 4004 does now ?</tokentext>
<sentencetext>When we get the Core i7 details, will it seem as quaint as the 4004 does now?</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122188</id>
	<title>Re:Awesome!</title>
	<author>dissy</author>
	<datestamp>1258368360000</datestamp>
	<modclass>Interestin</modclass>
	<modscore>5</modscore>
	<htmltext><p><i>One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which didn't translate to ANYTHING in the real world. Oh yeah, and it was RISC. *Snoooreeee*</i></p><p>That's only because you dropped out before getting to the <a href="http://en.wikipedia.org/wiki/Field-programmable\_gate\_array" title="wikipedia.org">FPGA</a> [wikipedia.org] classes!</p><p>Any functional CPU design (technically non-functional ones too, for whatever good that would do) can be flashed into an FPGA and become as real as any other silicon chip.</p><p>And identical to psudocode, psudo-chipfab can be translated into any real code/fab language by anyone that knows basic design and the target language.  You were supposed to be learning the basic design part, so once you got to using a real language used in the real world, you would have some clue what to do with it.</p></htmltext>
<tokenext>One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which did n't translate to ANYTHING in the real world .
Oh yeah , and it was RISC .
* Snoooreeee * That 's only because you dropped out before getting to the FPGA [ wikipedia.org ] classes ! Any functional CPU design ( technically non-functional ones too , for whatever good that would do ) can be flashed into an FPGA and become as real as any other silicon chip.And identical to psudocode , psudo-chipfab can be translated into any real code/fab language by anyone that knows basic design and the target language .
You were supposed to be learning the basic design part , so once you got to using a real language used in the real world , you would have some clue what to do with it .</tokentext>
<sentencetext>One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which didn't translate to ANYTHING in the real world.
Oh yeah, and it was RISC.
*Snoooreeee*That's only because you dropped out before getting to the FPGA [wikipedia.org] classes!Any functional CPU design (technically non-functional ones too, for whatever good that would do) can be flashed into an FPGA and become as real as any other silicon chip.And identical to psudocode, psudo-chipfab can be translated into any real code/fab language by anyone that knows basic design and the target language.
You were supposed to be learning the basic design part, so once you got to using a real language used in the real world, you would have some clue what to do with it.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121058</id>
	<title>A great presentation of it all on YouTube</title>
	<author>Anonymous</author>
	<datestamp>1258364340000</datestamp>
	<modclass>Informativ</modclass>
	<modscore>4</modscore>
	<htmltext><p>Link: <a href="http://www.youtube.com/watch?v=j00AULJLCNo" title="youtube.com">http://www.youtube.com/watch?v=j00AULJLCNo</a> [youtube.com]</p></htmltext>
<tokenext>Link : http : //www.youtube.com/watch ? v = j00AULJLCNo [ youtube.com ]</tokentext>
<sentencetext>Link: http://www.youtube.com/watch?v=j00AULJLCNo [youtube.com]</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122940</id>
	<title>Non commercial use?</title>
	<author>serviscope\_minor</author>
	<datestamp>1258371480000</datestamp>
	<modclass>Funny</modclass>
	<modscore>3</modscore>
	<htmltext><p>Available for non commercial use? Are they even entertaining the possibility that somoent might try to profit from the design?</p></htmltext>
<tokenext>Available for non commercial use ?
Are they even entertaining the possibility that somoent might try to profit from the design ?</tokentext>
<sentencetext>Available for non commercial use?
Are they even entertaining the possibility that somoent might try to profit from the design?</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30123480</id>
	<title>Whoopy</title>
	<author>Anonymous</author>
	<datestamp>1258373940000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>That's am important piece of intellectual property that is.  I doubt anyone could possibly design a 4 bit microprocessor without Intel's help.  Good thing they finally got around to putting this 39-40 year old design into the public domain.  We need cheap calculators!</p></htmltext>
<tokenext>That 's am important piece of intellectual property that is .
I doubt anyone could possibly design a 4 bit microprocessor without Intel 's help .
Good thing they finally got around to putting this 39-40 year old design into the public domain .
We need cheap calculators !</tokentext>
<sentencetext>That's am important piece of intellectual property that is.
I doubt anyone could possibly design a 4 bit microprocessor without Intel's help.
Good thing they finally got around to putting this 39-40 year old design into the public domain.
We need cheap calculators!</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127712</id>
	<title>Re:So in 2047...</title>
	<author>Alioth</author>
	<datestamp>1258463580000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>Although a great deal of those transistors will be the same thing over and over again - the cache.</p></htmltext>
<tokenext>Although a great deal of those transistors will be the same thing over and over again - the cache .</tokentext>
<sentencetext>Although a great deal of those transistors will be the same thing over and over again - the cache.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122408</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126886</id>
	<title>Great, now I cam make my own calculators...</title>
	<author>jameskojiro</author>
	<datestamp>1258449840000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>I just need to make my own chip fab in my garage and hundreds of hazardous chemicals that are sure to get me on DHS's shit list....</p></htmltext>
<tokenext>I just need to make my own chip fab in my garage and hundreds of hazardous chemicals that are sure to get me on DHS 's shit list... .</tokentext>
<sentencetext>I just need to make my own chip fab in my garage and hundreds of hazardous chemicals that are sure to get me on DHS's shit list....</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30135898</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>Anonymous</author>
	<datestamp>1258455960000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>As a materials scientist, let me answer that!</p><p>It would be faster!  The smaller distances in the 40nm transistors means that the electrons running across the transistor can send their messages faster, so you can turn them on and off faster (i.e. faster clock speeds)  Also it helps having shorter transistors because it decreases the probability for an electron to recombine with a hole and thus signal is lost.  Smaller is really much much better in most all regards.</p></htmltext>
<tokenext>As a materials scientist , let me answer that ! It would be faster !
The smaller distances in the 40nm transistors means that the electrons running across the transistor can send their messages faster , so you can turn them on and off faster ( i.e .
faster clock speeds ) Also it helps having shorter transistors because it decreases the probability for an electron to recombine with a hole and thus signal is lost .
Smaller is really much much better in most all regards .</tokentext>
<sentencetext>As a materials scientist, let me answer that!It would be faster!
The smaller distances in the 40nm transistors means that the electrons running across the transistor can send their messages faster, so you can turn them on and off faster (i.e.
faster clock speeds)  Also it helps having shorter transistors because it decreases the probability for an electron to recombine with a hole and thus signal is lost.
Smaller is really much much better in most all regards.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122302</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121548</id>
	<title>Re:Awesome!</title>
	<author>Anonymous</author>
	<datestamp>1258366440000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>All professors are heavily in to MIPS, and you, like me, and everyone else who's taken Introduction to Computer Architecture, know why.</p></htmltext>
<tokenext>All professors are heavily in to MIPS , and you , like me , and everyone else who 's taken Introduction to Computer Architecture , know why .</tokentext>
<sentencetext>All professors are heavily in to MIPS, and you, like me, and everyone else who's taken Introduction to Computer Architecture, know why.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121176</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122238</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>Hatta</author>
	<datestamp>1258368540000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>For that matter, what if you made a CPU with a <a href="http://hardware.slashdot.org/article.pl?sid=09/11/16/1849259" title="slashdot.org">hundred million</a> [slashdot.org] of these?</p></htmltext>
<tokenext>For that matter , what if you made a CPU with a hundred million [ slashdot.org ] of these ?</tokentext>
<sentencetext>For that matter, what if you made a CPU with a hundred million [slashdot.org] of these?</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121230</id>
	<title>uh</title>
	<author>Anonymous</author>
	<datestamp>1258365060000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p><div class="quote"><p>Lajos Kintli finished reverse-engineering the 4001 ROM from photomicrographs</p></div><p>1. Who is paying for this?</p><p>2. http://xenia.media.mit.edu/~mcnerney/2009-4004/4001-composite-photo.jpg looks nice but tells me little about individual components. What's actually being used as source material?</p></div>
	</htmltext>
<tokenext>Lajos Kintli finished reverse-engineering the 4001 ROM from photomicrographs1 .
Who is paying for this ? 2 .
http : //xenia.media.mit.edu/ ~ mcnerney/2009-4004/4001-composite-photo.jpg looks nice but tells me little about individual components .
What 's actually being used as source material ?</tokentext>
<sentencetext>Lajos Kintli finished reverse-engineering the 4001 ROM from photomicrographs1.
Who is paying for this?2.
http://xenia.media.mit.edu/~mcnerney/2009-4004/4001-composite-photo.jpg looks nice but tells me little about individual components.
What's actually being used as source material?
	</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126064</id>
	<title>Re:Awesome!</title>
	<author>Skeptic Al</author>
	<datestamp>1258395780000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>That is way oversimplifying what is needed to make a competitive chip.  If it was that easy, there would be a lot of people doing it, giving Intel a lot more competition than they have.  And it wouldn't take ~2-3 years per generation.</p><p>In order to get high performance (== high frequency, and == reasonable die size), you cannot rely completely on automated tools.</p></htmltext>
<tokenext>That is way oversimplifying what is needed to make a competitive chip .
If it was that easy , there would be a lot of people doing it , giving Intel a lot more competition than they have .
And it would n't take ~ 2-3 years per generation.In order to get high performance ( = = high frequency , and = = reasonable die size ) , you can not rely completely on automated tools .</tokentext>
<sentencetext>That is way oversimplifying what is needed to make a competitive chip.
If it was that easy, there would be a lot of people doing it, giving Intel a lot more competition than they have.
And it wouldn't take ~2-3 years per generation.In order to get high performance (== high frequency, and == reasonable die size), you cannot rely completely on automated tools.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121508</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121342</id>
	<title>Old joke for old hardware...</title>
	<author>ilsaloving</author>
	<datestamp>1258365480000</datestamp>
	<modclass>Funny</modclass>
	<modscore>1</modscore>
	<htmltext>Imagine a beowulf cluster of these!</htmltext>
<tokenext>Imagine a beowulf cluster of these !</tokentext>
<sentencetext>Imagine a beowulf cluster of these!</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122522</id>
	<title>Re:So, will it...</title>
	<author>Hatta</author>
	<datestamp>1258369560000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>Linux requires at least a 386, always has.   I'm not sure there's a UNIX that will run on any 8-bit or earlier processor.</p></htmltext>
<tokenext>Linux requires at least a 386 , always has .
I 'm not sure there 's a UNIX that will run on any 8-bit or earlier processor .</tokentext>
<sentencetext>Linux requires at least a 386, always has.
I'm not sure there's a UNIX that will run on any 8-bit or earlier processor.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121768</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126180</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>Anonymous</author>
	<datestamp>1258397400000</datestamp>
	<modclass>None</modclass>
	<modscore>0</modscore>
	<htmltext><p>Now that it's public, is 4004 going to be the first cubic microprocessor, laid out in 3 dimensions rather than on a flat silicon surface?</p><p>Some researcher somewhere might be tuning his nano assembler for it right now..</p></htmltext>
<tokenext>Now that it 's public , is 4004 going to be the first cubic microprocessor , laid out in 3 dimensions rather than on a flat silicon surface ? Some researcher somewhere might be tuning his nano assembler for it right now. .</tokentext>
<sentencetext>Now that it's public, is 4004 going to be the first cubic microprocessor, laid out in 3 dimensions rather than on a flat silicon surface?Some researcher somewhere might be tuning his nano assembler for it right now..</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122008</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>Anonymous</author>
	<datestamp>1258367820000</datestamp>
	<modclass>Informativ</modclass>
	<modscore>2</modscore>
	<htmltext><p>Probably the same 740kHz that the original 4004 had.</p><p>The manufacturing process used has nothing to do with the maximum clock speed a chip can achieve. It's about energy bleeding (heat loss) and the transistor density. If you manufacture a 4004 using 1950's-era technology, with actual honest-to-goodness 1mm-thick copper wire and large physical transistor switches, it'd be a *lot* bigger, but it'd achieve the same 740kHz that the design allows for.</p><p>The reason using a smaller manufacturing process translates into a higher clock speed is that the smaller manufacturing process means that each logic gate takes up a smaller amount of space on the die. This means that you can cram more transistors in to the same area of silicon, allowing you to complete more operations per clock cycle. This way, using a 40nm process instead of the original manufacturing process means that you can build a 4004 that takes up a ridiculously small amount of physical space, not that you can magically build one that's faster than the original design.<nobr> <wbr></nobr>:)</p></htmltext>
<tokenext>Probably the same 740kHz that the original 4004 had.The manufacturing process used has nothing to do with the maximum clock speed a chip can achieve .
It 's about energy bleeding ( heat loss ) and the transistor density .
If you manufacture a 4004 using 1950 's-era technology , with actual honest-to-goodness 1mm-thick copper wire and large physical transistor switches , it 'd be a * lot * bigger , but it 'd achieve the same 740kHz that the design allows for.The reason using a smaller manufacturing process translates into a higher clock speed is that the smaller manufacturing process means that each logic gate takes up a smaller amount of space on the die .
This means that you can cram more transistors in to the same area of silicon , allowing you to complete more operations per clock cycle .
This way , using a 40nm process instead of the original manufacturing process means that you can build a 4004 that takes up a ridiculously small amount of physical space , not that you can magically build one that 's faster than the original design .
: )</tokentext>
<sentencetext>Probably the same 740kHz that the original 4004 had.The manufacturing process used has nothing to do with the maximum clock speed a chip can achieve.
It's about energy bleeding (heat loss) and the transistor density.
If you manufacture a 4004 using 1950's-era technology, with actual honest-to-goodness 1mm-thick copper wire and large physical transistor switches, it'd be a *lot* bigger, but it'd achieve the same 740kHz that the design allows for.The reason using a smaller manufacturing process translates into a higher clock speed is that the smaller manufacturing process means that each logic gate takes up a smaller amount of space on the die.
This means that you can cram more transistors in to the same area of silicon, allowing you to complete more operations per clock cycle.
This way, using a 40nm process instead of the original manufacturing process means that you can build a 4004 that takes up a ridiculously small amount of physical space, not that you can magically build one that's faster than the original design.
:)</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121768</id>
	<title>Re:So, will it...</title>
	<author>Anonymous</author>
	<datestamp>1258367220000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>Yes. Linux will run on anything from a supercomputer to a wristwatch.</p></htmltext>
<tokenext>Yes .
Linux will run on anything from a supercomputer to a wristwatch .</tokentext>
<sentencetext>Yes.
Linux will run on anything from a supercomputer to a wristwatch.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121260</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124482</id>
	<title>Re:Awesome!</title>
	<author>hairyfeet</author>
	<datestamp>1258379940000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>While I wouldn't expect them to give out Core, or hell even the "smoking hot" Netburst P4 (damn that thing was a space heater!) but why not the old x86 designs? I mean is there anybody out there that has a real use for a 286 or 386 except for history class? It would be nice to check out those old designs and I doubt they'd be giving away any trade secrets on Core with chips that old.</p><p>

 In fact it would be cool, at least IMHO if we could see Intel 386 VS AMD VS Cyrix VS WinChip, just to see how each company went about designing their chips. Maybe somebody should write AMD and see if they have those old plans in the basement somewhere?</p></htmltext>
<tokenext>While I would n't expect them to give out Core , or hell even the " smoking hot " Netburst P4 ( damn that thing was a space heater !
) but why not the old x86 designs ?
I mean is there anybody out there that has a real use for a 286 or 386 except for history class ?
It would be nice to check out those old designs and I doubt they 'd be giving away any trade secrets on Core with chips that old .
In fact it would be cool , at least IMHO if we could see Intel 386 VS AMD VS Cyrix VS WinChip , just to see how each company went about designing their chips .
Maybe somebody should write AMD and see if they have those old plans in the basement somewhere ?</tokentext>
<sentencetext>While I wouldn't expect them to give out Core, or hell even the "smoking hot" Netburst P4 (damn that thing was a space heater!
) but why not the old x86 designs?
I mean is there anybody out there that has a real use for a 286 or 386 except for history class?
It would be nice to check out those old designs and I doubt they'd be giving away any trade secrets on Core with chips that old.
In fact it would be cool, at least IMHO if we could see Intel 386 VS AMD VS Cyrix VS WinChip, just to see how each company went about designing their chips.
Maybe somebody should write AMD and see if they have those old plans in the basement somewhere?</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121850</id>
	<title>Control Systems using 4004</title>
	<author>SwedishChef</author>
	<datestamp>1258367460000</datestamp>
	<modclass>Interestin</modclass>
	<modscore>5</modscore>
	<htmltext><p>In the very early 70s our engineering group was interested in using the new 4004 to simplify the production of control systems for heavy machinery (windlasses, hydraulic systems, etc). The machinery itself was slightly different from contract to contract and even from item to item within a contract so we had to design a new control system for each unit. When the 4004 came out we were excited to see if we couldn't do it cheaper and faster using a microprocessor.</p><p>We had moved from relays and discrete wiring to CMOS components on printed circuit boards and thought that was a big step. CMOS could be run at 15vdc which meant that the noise inherent in the environments our machinery worked in would not be quite as big a problem.</p><p>Unfortunately we discovered that we had several problems including the limited instruction set and memory capabilities of the 4004 along with the lower voltages needed so we stuck to CMOS until I left a couple of years later.</p><p>Still, the 4004 was my introduction to microprocessors and that changed the course of my career from electronics and electronic control systems to digital control systems and computers.</p><p>It's been an exciting ride, too. I am grateful to have grown up with the technology.</p></htmltext>
<tokenext>In the very early 70s our engineering group was interested in using the new 4004 to simplify the production of control systems for heavy machinery ( windlasses , hydraulic systems , etc ) .
The machinery itself was slightly different from contract to contract and even from item to item within a contract so we had to design a new control system for each unit .
When the 4004 came out we were excited to see if we could n't do it cheaper and faster using a microprocessor.We had moved from relays and discrete wiring to CMOS components on printed circuit boards and thought that was a big step .
CMOS could be run at 15vdc which meant that the noise inherent in the environments our machinery worked in would not be quite as big a problem.Unfortunately we discovered that we had several problems including the limited instruction set and memory capabilities of the 4004 along with the lower voltages needed so we stuck to CMOS until I left a couple of years later.Still , the 4004 was my introduction to microprocessors and that changed the course of my career from electronics and electronic control systems to digital control systems and computers.It 's been an exciting ride , too .
I am grateful to have grown up with the technology .</tokentext>
<sentencetext>In the very early 70s our engineering group was interested in using the new 4004 to simplify the production of control systems for heavy machinery (windlasses, hydraulic systems, etc).
The machinery itself was slightly different from contract to contract and even from item to item within a contract so we had to design a new control system for each unit.
When the 4004 came out we were excited to see if we couldn't do it cheaper and faster using a microprocessor.We had moved from relays and discrete wiring to CMOS components on printed circuit boards and thought that was a big step.
CMOS could be run at 15vdc which meant that the noise inherent in the environments our machinery worked in would not be quite as big a problem.Unfortunately we discovered that we had several problems including the limited instruction set and memory capabilities of the 4004 along with the lower voltages needed so we stuck to CMOS until I left a couple of years later.Still, the 4004 was my introduction to microprocessors and that changed the course of my career from electronics and electronic control systems to digital control systems and computers.It's been an exciting ride, too.
I am grateful to have grown up with the technology.</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040</id>
	<title>Awesome!</title>
	<author>Anonymous</author>
	<datestamp>1258364280000</datestamp>
	<modclass>Funny</modclass>
	<modscore>1</modscore>
	<htmltext>Maybe that means that computer architecture classes can finally start using real chips to study rather than made up chip designs?<br> <br>
One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which didn't translate to ANYTHING in the real world. Oh yeah, and it was RISC. *Snoooreeee*</htmltext>
<tokenext>Maybe that means that computer architecture classes can finally start using real chips to study rather than made up chip designs ?
One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which did n't translate to ANYTHING in the real world .
Oh yeah , and it was RISC .
* Snoooreeee *</tokentext>
<sentencetext>Maybe that means that computer architecture classes can finally start using real chips to study rather than made up chip designs?
One of the things I hated most about my computer arch class was that we had to learn about a completely made up system design which didn't translate to ANYTHING in the real world.
Oh yeah, and it was RISC.
*Snoooreeee*</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122302</id>
	<title>Re:If one was produced with a 40nm process...</title>
	<author>mako1138</author>
	<datestamp>1258368840000</datestamp>
	<modclass>Insightful</modclass>
	<modscore>4</modscore>
	<htmltext><p><div class="quote"><p>This means that you can cram more transistors in to the same area of silicon, allowing you to complete more operations per clock cycle.</p></div><p>This is true, but smaller process nodes also produce faster transistors. When you make things on the chip smaller, you have the practical effect of reducing parasitic capacitance in transistors and interconnect. Lower capacitance means a smaller RC time constant (using a first-order model), so logic will work faster. Intel's 45nm process can create an inverter with a delay of less than 5 ps.</p><p>Your statements imply that transistors have a fixed speed, and that the only way to improve performance is parallelism. This is false.</p></div>
	</htmltext>
<tokenext>This means that you can cram more transistors in to the same area of silicon , allowing you to complete more operations per clock cycle.This is true , but smaller process nodes also produce faster transistors .
When you make things on the chip smaller , you have the practical effect of reducing parasitic capacitance in transistors and interconnect .
Lower capacitance means a smaller RC time constant ( using a first-order model ) , so logic will work faster .
Intel 's 45nm process can create an inverter with a delay of less than 5 ps.Your statements imply that transistors have a fixed speed , and that the only way to improve performance is parallelism .
This is false .</tokentext>
<sentencetext>This means that you can cram more transistors in to the same area of silicon, allowing you to complete more operations per clock cycle.This is true, but smaller process nodes also produce faster transistors.
When you make things on the chip smaller, you have the practical effect of reducing parasitic capacitance in transistors and interconnect.
Lower capacitance means a smaller RC time constant (using a first-order model), so logic will work faster.
Intel's 45nm process can create an inverter with a delay of less than 5 ps.Your statements imply that transistors have a fixed speed, and that the only way to improve performance is parallelism.
This is false.
	</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122008</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121176</id>
	<title>Re:Awesome!</title>
	<author>tehSpork</author>
	<datestamp>1258364820000</datestamp>
	<modclass>Interestin</modclass>
	<modscore>2</modscore>
	<htmltext>Unfortunately the Intel 4004 is much less sophisticated than even the simplistic models I studied as an undergrad. Not to mention that real chips suffer from real compromises and real problems, something our academic fantasy-land models never had to deal with. The simple models allow the students to learn the important concepts (such as multi-cycle instructions, pipelining, caching) without having to worry about why it was implemented a certain way, the concepts are what counted.
<br> <br>
In my computer architecture classes we at least looked at the IA32 architecture but it was more of a space-filler and not a primary focus, our professor was heavily into MIPS.</htmltext>
<tokenext>Unfortunately the Intel 4004 is much less sophisticated than even the simplistic models I studied as an undergrad .
Not to mention that real chips suffer from real compromises and real problems , something our academic fantasy-land models never had to deal with .
The simple models allow the students to learn the important concepts ( such as multi-cycle instructions , pipelining , caching ) without having to worry about why it was implemented a certain way , the concepts are what counted .
In my computer architecture classes we at least looked at the IA32 architecture but it was more of a space-filler and not a primary focus , our professor was heavily into MIPS .</tokentext>
<sentencetext>Unfortunately the Intel 4004 is much less sophisticated than even the simplistic models I studied as an undergrad.
Not to mention that real chips suffer from real compromises and real problems, something our academic fantasy-land models never had to deal with.
The simple models allow the students to learn the important concepts (such as multi-cycle instructions, pipelining, caching) without having to worry about why it was implemented a certain way, the concepts are what counted.
In my computer architecture classes we at least looked at the IA32 architecture but it was more of a space-filler and not a primary focus, our professor was heavily into MIPS.</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124236</id>
	<title>That takes me back</title>
	<author>certsoft</author>
	<datestamp>1258378140000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext>Somewhere around 1975 or 1976 I worked at the micro-electronics lab at Point Mugu Naval Air Station. We did a number of projects using a 4004 and those awful 1702 EPROMs. I remember using one to run a X/Y Table and sensor probe to test thick film (might have been thin film) resistor wafers. If a chip wasn't in tolerance a drop of magnetic ink would be dropped on it.<br>
<br>
We used a timeshare service via a Model 33 teletype with acoustic modem to access a 4004 assembler. It would spit out a paper tape that we would use for the EPROM burner system. I think I like Eclipse better.</htmltext>
<tokenext>Somewhere around 1975 or 1976 I worked at the micro-electronics lab at Point Mugu Naval Air Station .
We did a number of projects using a 4004 and those awful 1702 EPROMs .
I remember using one to run a X/Y Table and sensor probe to test thick film ( might have been thin film ) resistor wafers .
If a chip was n't in tolerance a drop of magnetic ink would be dropped on it .
We used a timeshare service via a Model 33 teletype with acoustic modem to access a 4004 assembler .
It would spit out a paper tape that we would use for the EPROM burner system .
I think I like Eclipse better .</tokentext>
<sentencetext>Somewhere around 1975 or 1976 I worked at the micro-electronics lab at Point Mugu Naval Air Station.
We did a number of projects using a 4004 and those awful 1702 EPROMs.
I remember using one to run a X/Y Table and sensor probe to test thick film (might have been thin film) resistor wafers.
If a chip wasn't in tolerance a drop of magnetic ink would be dropped on it.
We used a timeshare service via a Model 33 teletype with acoustic modem to access a 4004 assembler.
It would spit out a paper tape that we would use for the EPROM burner system.
I think I like Eclipse better.</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121554</id>
	<title>Dude!</title>
	<author>NoYob</author>
	<datestamp>1258366500000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p><div class="quote"><p>Imagine a beowulf cluster of these!</p></div><p>First Post said just that.</p><p>I know that most first posts are GNAA trolls, or something else pretty obtuse, but come on! You're waaaay down here and you honestly thought you'd be the first one to post that?! </p><p>There's already been a "Does it run Linux?" post and if I dug into the -1s, I'm sure there would be a "In Soviet Russia, 4004 processes you!" or some such thing about Cowboy Neal's something using 4004 in the description.</p><p>These are things one learns in the first few days of Slashdotting. </p><p>Man, go and read "Slashdot for Beginners" somewhere on Wikipedia - you know there's GOT to be an article on it somewhere there.</p></div>
	</htmltext>
<tokenext>Imagine a beowulf cluster of these ! First Post said just that.I know that most first posts are GNAA trolls , or something else pretty obtuse , but come on !
You 're waaaay down here and you honestly thought you 'd be the first one to post that ? !
There 's already been a " Does it run Linux ?
" post and if I dug into the -1s , I 'm sure there would be a " In Soviet Russia , 4004 processes you !
" or some such thing about Cowboy Neal 's something using 4004 in the description.These are things one learns in the first few days of Slashdotting .
Man , go and read " Slashdot for Beginners " somewhere on Wikipedia - you know there 's GOT to be an article on it somewhere there .</tokentext>
<sentencetext>Imagine a beowulf cluster of these!First Post said just that.I know that most first posts are GNAA trolls, or something else pretty obtuse, but come on!
You're waaaay down here and you honestly thought you'd be the first one to post that?!
There's already been a "Does it run Linux?
" post and if I dug into the -1s, I'm sure there would be a "In Soviet Russia, 4004 processes you!
" or some such thing about Cowboy Neal's something using 4004 in the description.These are things one learns in the first few days of Slashdotting.
Man, go and read "Slashdot for Beginners" somewhere on Wikipedia - you know there's GOT to be an article on it somewhere there.
	</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121342</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121260</id>
	<title>So, will it...</title>
	<author>filesiteguy</author>
	<datestamp>1258365120000</datestamp>
	<modclass>Funny</modclass>
	<modscore>3</modscore>
	<htmltext>...run Linux?<br><br>j/k<br><br>This should actually be quite cool. I can see garage-based tinkerers messing with this chip, the registry and even coming up with a retro User Group.</htmltext>
<tokenext>...run Linux ? j/kThis should actually be quite cool .
I can see garage-based tinkerers messing with this chip , the registry and even coming up with a retro User Group .</tokentext>
<sentencetext>...run Linux?j/kThis should actually be quite cool.
I can see garage-based tinkerers messing with this chip, the registry and even coming up with a retro User Group.</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127770</id>
	<title>Re:Federico Faggin, intel4004.com</title>
	<author>Alioth</author>
	<datestamp>1258464720000</datestamp>
	<modclass>None</modclass>
	<modscore>1</modscore>
	<htmltext><p>The site doesn't make it clear - was Faggin shafted by Intel while working for him (and left to form Zilog as a consequence), or did Faggin leave and start Zilog, and then Intel tried to discredit him as an act of sour grapes?</p></htmltext>
<tokenext>The site does n't make it clear - was Faggin shafted by Intel while working for him ( and left to form Zilog as a consequence ) , or did Faggin leave and start Zilog , and then Intel tried to discredit him as an act of sour grapes ?</tokentext>
<sentencetext>The site doesn't make it clear - was Faggin shafted by Intel while working for him (and left to form Zilog as a consequence), or did Faggin leave and start Zilog, and then Intel tried to discredit him as an act of sour grapes?</sentencetext>
	<parent>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121806</parent>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124992</id>
	<title>moD up</title>
	<author>Anonymous</author>
	<datestamp>1258384440000</datestamp>
	<modclass>Troll</modclass>
	<modscore>-1</modscore>
	<htmltext><A HREF="http://goat.cx/" title="goat.cx" rel="nofollow">Do, or indeed what questions, then of FreeBSD Usenet consistent witH the From a technical Are tied up in in ratio of 5 to moronic, dileetante</a> [goat.cx]</htmltext>
<tokenext>Do , or indeed what questions , then of FreeBSD Usenet consistent witH the From a technical Are tied up in in ratio of 5 to moronic , dileetante [ goat.cx ]</tokentext>
<sentencetext>Do, or indeed what questions, then of FreeBSD Usenet consistent witH the From a technical Are tied up in in ratio of 5 to moronic, dileetante [goat.cx]</sentencetext>
</comment>
<comment>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121116</id>
	<title>Italian business</title>
	<author>Anonymous</author>
	<datestamp>1258364640000</datestamp>
	<modclass>Interestin</modclass>
	<modscore>4</modscore>
	<htmltext>It'd be nice to remember that the <a href="http://en.wikipedia.org/wiki/Federico\_Faggin" title="wikipedia.org">Italian Business</a> [wikipedia.org] was a good thing in this case at least!</htmltext>
<tokenext>It 'd be nice to remember that the Italian Business [ wikipedia.org ] was a good thing in this case at least !</tokentext>
<sentencetext>It'd be nice to remember that the Italian Business [wikipedia.org] was a good thing in this case at least!</sentencetext>
</comment>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_11</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122188
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_15</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30129842
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121260
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_2</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127712
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122408
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121050
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_6</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121138
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_12</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124252
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122940
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_16</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121360
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_13</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127690
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_0</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30125080
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122522
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121768
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121260
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_10</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122238
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_17</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126064
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121508
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_8</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127770
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121806
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_4</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124482
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_3</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122674
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_7</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122450
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122008
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_14</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121554
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121342
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_18</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121548
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121176
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_1</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126180
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_5</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122554
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122408
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121050
</commentlist>
</thread>
<thread>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#thread_09_11_16_2020235_9</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30135898
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122302
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122008
http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172
</commentlist>
</thread>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.9</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121058
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.7</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121806
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127770
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.1</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121172
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122674
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122238
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122008
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122450
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122302
---http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30135898
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126180
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.11</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122940
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124252
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.6</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121260
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121768
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122522
---http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30125080
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30129842
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.4</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121050
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122408
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127712
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122554
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.10</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121116
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.8</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121850
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.5</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121342
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121554
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.2</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124236
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.3</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121040
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121138
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121136
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121508
---http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30126064
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30124482
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121360
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30122188
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121176
--http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30121548
-http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30127690
</commentlist>
</conversation>
<conversation>
	<id>http://www.semanticweb.org/ontologies/ConversationInstances.owl#conversation09_11_16_2020235.0</id>
	<commentlist>http://www.semanticweb.org/ontologies/ConversationInstances.owl#comment09_11_16_2020235.30120978
</commentlist>
</conversation>
