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Semiconductor-Processing CAD and 3-Dimensional MEMS Simulation Status Report, Q2 1999

Translinear Analog Signal Processing: A Framework for Low-Voltage, Low-Power Adaptive Analog Signal Processing - Bradley A. Minch

To date, there is not much progress to report on research done using machine from the "Technology for Education 2000" Intel grant. One machine, a dual-processor 200-MHz Pentium Pro computer, has been received by my laboratory under the grant. This computer was installed on my desk sometime late in the fall semester. Since that time, I have been its sole user. Soon after this machine was installed, I purchased a complete suite of computer aided design tools for integrated circuit design from Tanner Research. These relatively low-cost design tools are primarily targeted for Pentium-based machines. Over the break between semesters, I used the Intel machine to design two small integrated circuits containing several test circuits including first-order and second-order continuous-time filters using floating-gate MOS (FGMOS) transistors. In mid January, these chips were submitted to the MOS Implementation Service (MOSIS) for fabrication in AMI's 1.2-µm double-poly CMOS process with a bipolar option. I recently received these chips back from fabrication and I hope to test them in the near future. The circuits and test structures on these chips will allow me to explore various facets of a modular framework, which I call translinear analog signal processing (TASP), for constructing large-scale, low-power, low-voltage, continuous-time analog signal processing systems that are adap-tive and/or reconfigurable. In the next quarter, I hope to test the chips that have been fab-ricated and further explore the TASP framework.

Technology CAD - Edwin C. Kan

Last modified on: 10/12/99