3/1/2006 -- Please let Milind know about your project preferences by this Friday (3/3/06). Also, schedule a time to meet with Keshav regarding the projects before next Friday (3/10/06).
3/1/2006 -- Tim Sweeney gave an invited talk at POPL 2006, where he discussed features he'd like to see in next generation programming languages. One thing he mentioned as useful? Transactional memory for concurrency! Check out his talk here. Warning: 9 MB file.
In Spring 2006, CS 612 will focus on the software problem for multicore processors. Because of power issues, CPU chip manufacturers are not
increasing clock frequencies, so future improvements in program
performance must come from exploiting thread-level parallelism in programs.
We will survey what is known about this area, and investigate approaches for addressing this problem. Course topics include:
- Multicore processors: architecture and programming
- Shared-memory programming: OpenMP
- Applications: engineering and commercial workloads
- Memory consistency models
- Optimistic parallelization: transactional memory
- Pessimistic parallelization: dependence analysis of regular and irregular codes
- Programming the memory hierarchy: cache-conscious and cache-oblivious approaches, I/O complexity of programs
- Scheduling and load balancing
- Self-optimizing systems: heuristic and model driven search, learning models for optimization
Students will be expected to present papers, participate in class discussions and
do a substantial project relevant to multicore processors.
Students are also encouraged to co-register for ECE 572, taught by Professor
Jose Martinez, which will focus on the same problem but from a computer
architecture perspective.
A tentative schedule for lectures is here
A list of papers that will be covered in the course is here
The presentation on project choices is available here. Note that this page is only accessible from within the Cornell network (i.e. your connection must be coming from a Cornell IP address).