Active Memory - Hardware Technique to Improve Spatial Locality

Project Description

There are applications with poor spatial locality. Several software techniques such as tiling and loop transformation have been developed and they are quite successful. But there still remain some applications which can not be solved with only software techniques.

To solve this problem, new memory architectures are being researched and Active Memory systems is one of them. Main idea is to design a new memory controller. Conventional memory controllers can only get a whole contiguous cache line. So if there is no spatial locality within the cache line, it results in bad cache behavior. But the new controller can dynamically assemble a cache line. It gets useful data from different memory locations and make a cache line with them, to improve spatial locality.

The target application areas are as follows;

• Dense Matrix Applications which access data with stride.
• Sparse Matrix Applications which deals with dense vector.
• Applications which use Linked List data structure.
• Applications which has the 'Scatter/Gather' data access pattern.
• ...

Project Goals

The goal of this project is to find benchmark applications in the areas of 'Sparse Matrix' and 'Scatter/Gather', modify them for Active Memory systems and show that the new memory controller can solve the spatial locality problem.

What you need to do

• Read and understand the papers.
• Find benchmark applications.
• Develop a compiler to modify them for Active Memory Systems.
• Run simulations for both of the original benchmarks and Active Memory versions.
• Evaluate the performance improvement.

References

• A Case For Asynchronous Active Memories. R. Manohar and M. Heinrich
• Memory System Support for Dynamic Cacheline Assembly. Lixin Zhang, Venkata K. Pingali, Bharat Chandramouli, and John B. Carter
• Memory Forwarding: Enabling Aggressive Layout Optimizations by Guaranteeing the Safety of Data Relocation. Chi-Keung Luk, Todd C. Mowry