Lab 1 FAQ

CS3410 Spring 2015

Lab Due: Friday, February 13, 2015, 11:59pm


Q: How does component xxx work in Logisim?
We have had many questions asking about how to use a particular component in Logisim. In general, the help file in Logisim has explained things very well. You can access the help file from the 'Help' menu in Logisim. You could either search by keyword or browse the entire reference from the left pane.
Q: How to create a sub-circuit in Logisim?
Please refer to Sub-circuit creation.
Q: How to build a one-bit adder?
Logisim has a very nice feature for editing truth table and generating the corresponding logic circuit. You could refer to the following pages Edit truth table and Generate Circuit for an explanation.
The following steps have worked well:
  1. Place the desired input and output nodes in the canvas.
  2. Save the changes to the canvas.
  3. Right Click on the symbol that represents the current canvas in the explorer pane, and select 'Analyze Circuit' to bring up the 'Combinantional Analysis' window
  4. Edit the truth table and Generate the circuit
Q: How does this multiplexer thing work?
It takes multiple inputs and selects one of them based on the control signal. For instance, suppose I have 4 inputs into the multiplexer in the following order: 1, 2, 3, 4. Since we have 4 inputs, our control needs 2 bits (base 2 log of the number of inputs) to determine the output of the multiplexer. In this particular case, the mapping would be: 00 => 1, 01 => 2, 10 => 3, 11 => 4.

Shift and overflow

Q: Should our adder perform unsigned or two's complement addition? What is the difference?
What is the difference, indeed?
Q: How to do right shift with left shifter?
Hint: You need to manipulate the input bits before passing them to the left shifter, e.g. transform the input bits to an intermediate format, pass the input through the left shifter, and then do a reverse-transformation to get your result.
Q: My overflow bits are buried within my 16-bit adders! How am I supposed to XOR the carry-in and carry-out of the MSB?
You could either add a few extra outputs to your adders and only use them for the MSB, or you could detect overflows the alternate way: If the sign bit of the two inputs is the same but different from the output, you have an overflow.

Critical Path

Q: What is a critical path?
In synchronous logic (logic that is driven by a clock signal), the critical path is the slowest logic path in the circuit. In lab 1, we assumed that the operation of the ALU completes in one clock cycle. In order to determine how long the clock cycle is, you need to figure out which path in your circuit is the longest path for the input signals to propagate through. This particular path is called the critical path. The amount of time for the input signals to propagate through the critial path is the minimum length of one clock cycle. The reciprocal of the clock period gives the maximum frequency of the input clock signal.
Q: What is gate count?
In microprocessor design, gate count refers to the number of transistor switches, or gates, that are needed to implement a design. Even with today's process technology providing what was formerly considered impossible numbers of gates on a single chip, gate counts remain one of the most important overall factors in the end price of a chip. Designs with fewer gates will typically cost less, and for this reason gate count remains a commonly used metric in the industry.
Q: How should I count multi-input gates?
There has been some questions on how the gate count should be counted. After some deliberation, we decided to leave the option up to you, whichever is more convenient. Either way, you should state which method you are using.


Q: How do we test our circuits?
The Cornell version of Logisim adds a special "Test Vector" feature to Logisim for automated testing of circuits. The documentation for this is accessed from within Logisim: select Help->User's Guide from the toolbar. On the left pane of the help window that appears, look for and select the item labeled "Test Vectors".
Q: How do we comment our test vector files?
# starts a comment.
Q: To write a test case for my test vector, I need to know what the correct result for a certain operation is. How could I ever do this?
All of the ALU's operations are clearly defined arithmetic operations. The results can easily be computed by hand. Even better, implementations of these arithmetic operations are available in every major programming language.
Q: We can just use Logisim's logging feature to generate a test vector, right?

Let's get this straight. To verify the correctness of your ALU, you are going to log the output of your ALU for a few inputs, and then you are going to verify that your ALU gives the same output when given those same inputs?

This is basically asking "does your ALU produce the same outputs as your ALU?"

The first rule of tautology club is the first rule of tautology club.