Cornell University Computer Science Department, Spring 2012
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Topic | Readings from P&H | Homework/Prelims | Labs/Projects | ||
---|---|---|---|---|---|
1 | T Jan 24 | Intro [ |
]Lab0 (Due in Lab Section) |
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2 | R Jan 26 | Logic & Gates [ | ]Appendix C.2 and C.3, and Section 2.3 | ||
3 | T Jan 31 | Logic Minimization, & Numbers [ |
] 2.4 (unsigned), 2.5, 3.2, C.5 | HW1 (Due 02/06; 11:59pm) |
Lab1: ALU (Due 02/06; 11:59pm) FAQ for Lab1 |
4 | R Feb 2 | Arithmetic [ | ]2.4 (signed), 2.5, 2.6, 3.2, C.6 | ||
5 | T Feb 7 | State & FSMs [ |
] C.7, C.8 (up to register files), C.10, C.11 | Lab2: 8b/10b Encoder (Due 02/13; 11:59pm) FAQ for Lab2 |
|
6 | R Feb 9 | Memory [ | ]C.8 (register files), C.9 | ||
7 | T Feb 14 | A Simple CPU [ |
] 2.16-20, 4.1-4 | HW2 (Due 02/21; 11:59pm) |
PA1: Pipelined Mini-MIPS (Design Doc Due 02/20) (Project Due 03/05; 11:59pm) FAQ for PA1 |
8 | R Feb 16 | CPU Performance & Pipelines [ | ]1.4 & 4.5 | ||
9 | T Feb 21 | Pipelined MIPS [ |
] 4.6 | ||
10 | R Feb 23 | Data Hazards [ | ]4.7 | ||
11 | T Feb 28 | Control Hazards [ |
] 4.8 | Prelim 1 | |
12 | R Mar 1 | RISC & CISC & Assemblers [ | ]B.1-2, 2.8, 2.12; & 2.16 and 2.17 |
||
13 | T Mar 6 | Calling Conventions [ | ]B.5-6, 2.8, 2.12 | HW3 (Due 03/13; 11:59pm) |
PA2: Fully Pipelined MIPS (Design Doc Due 03/12) (WiP Circuit Due 03/16) (Project Due 04/02) FAQ for PA2 |
14 | R Mar 8 | Calling Conventions [ | ]|||
15 | T Mar 13 | Linkers [ |
] B.3-4 & 2.8 | HW4 (Due 03/27; 11:59pm) |
|
16 | R Mar 15 | Caches 1 [ | ]5.1-2 (except writes) | ||
- | T Mar 20 | (Spring Break) | |||
- | R Mar 22 | (Spring Break) | |||
17 | T Mar 27 | Caches 1 [ |
] |||
18 | R Mar 29 | Caches 2 [ | ] & Prelim2 ReviewPrelim 2 | ||
19 | T Apr 3 | Caches 3 [ |
] 5.2-3, 5.5 | HW5 (Due 04/10; 11:59pm) |
Lab3: Buffer Overflows (Due 04/09; 11:59pm) FAQ for Lab3 |
20 | R Apr 5 | Virtual Memory [ | ]5.4 (up to TLBs) | ||
21 | T Apr 10 | Virtual Memory 2 [ |
] 5.4 | PA3: FlameWar (Design Doc Due 04/16) (Project Due 04/23; 11:59pm) FAQ for PA3 |
|
22 | R Apr 12 | Virtual Memory 3 [ | ] & Traps [ ](VM) 5.4 (Traps) 4.9, pp 509-515, B7 |
||
23 | T Apr 17 | Multicore Architectures [ | ]4.10-11, 7.1-6 | HW6 (Due 04/24; 11:59pm) |
|
24 | R Apr 19 | Synchronization [ | ]2.11 | ||
25 | T Apr 24 | Synchronization 2 [ | ]|||
26 | R Apr 26 | Prelim 3 Review [ | ]Prelim 3 | ||
27 | T May 1 | Guest Lecture: Chris Batten I/O [ ] |
6.5-6 | PA4: Network Honeypot (Design Doc Due 05/07) (Project Due 05/16; 6:30pm) FAQ for PA4 |
|
28 | R May 3 | Future Directions [ | ]|||
- | T May 8 | (Study Week) | |||
- | R May 10 | ||||
- | T May 15 - F May 18 | |