CS 3410 - Spring 2010

Computer System Organization and Programming

Instructor: Kevin Walsh

Cornell University Computer Science Department, Spring 2010

Lecture Software and Hardware

Lectures were presented using:
  • a modified version (executable files, source files) of Classroom Presenter from the University of Washington...
  • on Windows Vista (Business Edition)
  • on a Lenovo x61 Tablet PC...
  • with a 32-bit Intel Core 2 Duo (Dual-Core) CPU running at 1.6 GHz...
  • built from 65 nanometer transistors...
  • using dual 8-way set associative 32 KB Level 1 data caches (64 byte line size)...
  • and dual 8-way set associative 32 KB Level 1 instruction caches (64 byte line size)...
  • and a unified 16-way set associative 4096 KB Level 2 cache (64 byte line size)...
  • on top of 2 GB of RAM