CS316 Programming Assignment 1: FAQ

Instructor: Kavita Bala

Due: Friday, September 14th, 2007, 11:59pm

 


4:00pm, September 21st: A few mistakes appeared repeatedly in submissions for PA1 and were a cause for losing points when they appeared. Almost all points lost were due to one or more of these:
  • Spaghetti circuits violating the left-to-right convention.
  • Incorrectly computing the overflow, especially by not considering enough bits.
  • Duplicating the adder in the subtractor rather than simply chaining a two's-complementer and a mux on one of the inputs to a single adder.
  • Computing two's complement by negating and using a full adder to add one, rather than simply using a not-gate and the cin value of the adder.
  • Duplicating the left-shifter in the right-shifter, rather than chaining reversers and muxes around a single left-shifter.
  • Duplicating the right-shifter once for arithmetic and once for logical, rather than wrapping cin logic around a single right-shifter. This was almost always combined with duplicating the left-shifter for the right-shifter, leading to a total of three 32-bit shifters rather than one.
  • Rippling shifters with a lot of muxes rather than putting all of the muxes at the top level. Rippling shifters but putting all muxes at the top level is okay.
  • Erroneously allowing "arithmetic" left shift (shifting in sign bit) or filling low bits with 1's instead of 0's.
  • Shifting A input (supposed to shift B).
  • Some components in some projects were wrapped up in another component that added nothing, but had a different name and just stuck wires on the inputs and outputs.
  • The use of bit selectors with constant inputs.
  • Unecessary use of demuxes.
  • Using muxes with constant inputs to accomplish the exact same thing as e.g. an AND gate.
  • Pointlessly building your own mux instead of using the Logisim component.
  • Gates with unused outputs.
  • Using tri-state inputs for any (sub)component.
  • Chaining adder, shifter, and bitwise logic instead of muxing them together at ALU level.
Conversely, some groups received small bonuses for particularly easy-to-follow and well-commented circuits.

11:00pm, September 11th: There have been a few questions about how to design the let shifter.  Think of the shifter design in three stages.  First design a 32-bit left shifting component.  This component takes three inputs, a 32-bit number to shift, B, a 5-bit shift amount, sa, and a 1-bit fill bit.  It takes B, shifts it to the left sa bits and fills in the least significant bits with sa copies of the fill bit.  It will be helpful to think of this component as series of shifts that do, or do not, shift the input left in successive fixed powers of two.  The second step is to consider how to use a single copy of this left shifting component to compute the three required operations, left shift logical, right shift logical and right shift arithmetic.  Each one can be accomplished by optionally transforming the inputs, setting the correct inputs of the left shifter above, and then optionally transforming the outputs.  Finally, implement the transformation and selection logic to compute each of the three shift operations with the one left shifting component.

5:00pm, September 11th: There has been some confusion about the requirements for your circuit's overflow bit.  Your circuits must correctly compute overflow when adding and subtracting and we expect you to implement a small amount of logic to do this.  However, you need not do anything with the overflow bit besides compute it.  The whole ALU circuit does not need (although it's fine if it does) have an overflow output.  To compute the overflow you will have to carefully consider the design of your 32-bit adder and modify it so you correctly compute the overflow for 2's complement math.  Any method that correctly computes the overflow is acceptable as long as it does not significantly decrease the performance of your circuit.

5:00pm, September 10th: There have been a few questions about logging in Logisim.  In general, the Logisim's online help provides useful information about using Logisim.  Specifically, the logging section explains the logging tools in more detail than will be summarized here.

The Logisim logger will record any change to the value of selected circuit components during simulation.  These changes can be either manually created using the poke tool or automatically caused by the clock. All memory components, inputs, outputs, clocks and probes can be logged.  The recorded values can either be logged in memory and displayed in a window on screen (the default) or recorded directly into a file.

When you bring up the logging window the three tabs allow you to, respectively, choose the components to log, view the current logged results, and enable file recording by selecting an output log file.  The table and file tabs are relatively self explanatory.  In the selection tab, the left window displays the components of the current circuit that can be logged and the right window displays the components that are currently being logged.  Selecting a component in the left window enables the add button which enables logging for that component and likewise selecting a component in the right window enables the remove button which disables logging for the selected component.

The radix of recorded values can be changed between 2, 10, and 16 by selecting a component from the right window and pressing the "change radix" button.  The "move up" and "move down" buttons change the order the logged values are recorded in the on screen table and output to a file. This file can then be opened in a spreadsheet program.

5:00pm, September 10th: Using buses dramatically reduces the visual complexity of your circuits and significantly reduces the wiring work for this assignment.  Make sure to put them to good use. Whenever possible you should combine groups of wires logically associated as the bits of a single value into a single bus wire representing the entire value.  Almost every component can be configured to use bus wires directly by altering its "Bit Width" parameter, although sometimes you must make the selection before you place the component into your circuit.  This is particularly important when defining inputs and outputs.  Specifically, the final ALU should have exactly four inputs (A[32bits], B[32bits], shift[5bits], and opcode[4bits]) and one output (answer[32bits]) although feel free to use different labels. 


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