Rajit Manohar

Cornell University—ece


Reconfigurable systems are compatible with current VLSI scaling trends. I will describe current reconfigurable systems (FPGAs), and discuss some of their performance challenges. I will present the design of a self-timed (asynchronous) architecture for reconfigurable systems. The self-timed FPGA is implemented as a configurable dataflow architecture, and attains a performance that significantly exceeds the performance of commercial FPGAs as well as any reported result in the literature.



Rajit Manohar is Professor of Electrical and Computer Engineering at Cornell. He received his Ph.D. (1998) in Computer Science from Caltech. His research interests are in the area of asynchronous design. He is the recipient of an NSF CAREER award, four best paper awards, six teaching awards, and was named to MIT technology review's top 35 young innovators under 35. He has worked on a number of asynchronous chips including the first microprocessor for sensor networks, a pipeline-configurable asynchronous FPGA, and the first radiation hardened SRAM-based FPGA.


B17 Upson Hall

Thursday, September 2, 2010

Refreshments at 3:45pm in the Upson 4th Floor Atrium


Computer Science


Fall 2010


Reconfigurable systems